1. Field of the Invention
The present invention relates to a method of driving a display panel including light-emitting elements arranged in a matrix.
2. Description of the Related Art
Recently, a plasma display panel (referred to as “PDP”) in which a number of discharge cells are arranged in a matrix has drawn attention as a two-dimensional image display panel. The PDP is directly driven by a digital image signal and the number of gradation levels (the number of luminance levels, gradation sequence) expressable by the PDP is decided by the number of bits of each pixel data included in the digital image signal.
A subfield method is known as a gradation sequence display method for the PDP. The subfield method divides a display period of one field into a plurality of subfields, and drives each discharge cell for each subfield. Each subfield includes an address period for setting each pixel in a lighting mode or a light extinguishing mode in accordance with the image data (pixel data) and an illumination maintaining (sustaining) period for only lighting a pixel in the lighting mode for a period determined by weighting of the subfield concerned. In other words, whether or not a discharge cell should be illuminated within each subfield (address period) is decided for each subfield, and only the discharge cell in the lighting mode is illuminated for a period (i.e., an illumination sustaining period) allocated to this subfield. Accordingly, one field may include one or more subfields in an illumination state and one or more subfields in a light extinguishment (extinction) state. Therefore, an intermediate (gray) luminance is created or perceived for that one field in accordance with a sum of the illumination periods of all the subfields in that one field.
One conventional method of driving a PDP is disclosed in Japanese Patent Kokai (Laid-Open Publication) No. 2001-154630. FIG. 1 of the accompanying drawings illustrates a light emission driving format for the PDP taught by this Japanese Patent Kokai No. 2001-154630. One field of an image signal is divided into twelve subfields SF1 to SF12, and driving of the PDP is executed for each subfield. Basically, each subfield includes an address stage Wc and an illumination (light emission) sustaining stage Ic. The address stage Wc sets each discharge cell of the PDP in either a lighting mode (i.e., an operable mode) or a light extinguishing mode (i.e., a nonoperable mode) on the basis of the input image data. The illumination sustaining stage Ic illuminates only a discharge cell in the lighting mode for a period (number of times) in accordance with weighting of the subfield concerned. It should be noted that an all-reset stage Rc is executed to initialize all the discharge cells of the PDP to the lighting mode in only the first subfield SF1 at the front end of the field, and an elimination (light extinction) stage E is executed in only the last subfield SF12 at the rear end of the field.
FIG. 2 of the accompanying drawings shows the relationship among pixel drive data GD obtained by applying a conversion process (will be described) to the pixel data, gradation levels (gradation sequence) corresponding to the pixel drive data GD, and a light emission driving pattern of the discharge cells in accordance with the pixel drive data GD. A similar diagram can be found in the above mentioned Japanese Patent Kokai No. 2001-154630.
By sampling an image signal, for example, pixel data of 8 bits can be obtained. The pixel data then undergoes a multi-gradation (grayscale) process, so that multi-gradation image data (pixel data) PDS is generated, of which the bit number is reduced to 4 bits, while maintaining the present number of gradation levels. The multi-gradation image data PDS is converted into the pixel driving data GD including first to twelfth bits in accordance with the conversion table shown in FIG. 2. The first to twelfth bits correspond to the subfields SF1 to SF12, respectively.
FIG. 3 of the accompanying drawings illustrates application timing of various driving pulses to row electrodes and column electrodes of the PDP in accordance with the light emission driving format shown in FIG. 2. A similar diagram can be found in the above mentioned Japanese Patent Kokai No. 2001-154630. FIG. 3 shows the driving of the PDP by a selective light-extinction method (one reset-one selective light extinction address method).
First, in the all-reset stage RC of the subfield SF1, a reset pulse RPX having a negative polarity is applied to row electrodes X1 to Xn. In parallel with application of such a reset pulse RPX, a reset pulse RPY having a positive polarity is applied to row electrodes Y1 to Yn. As a result of application of the reset pulses RPx and RPY, all discharge cells of the PDP are reset-discharged, so that a wall electric charge of a certain amount is equally formed within each of the discharge cells. All the discharge cells are therefore initialized into the lighting mode (illumination mode).
Next, at the address stage Wc of each subfield, a pixel data pulse DP having a voltage corresponding to a logic level of a pixel driving data bit DB (DB1 to DB12) is generated. The pixel driving data bits DB1 to DB12 correspond to the first to twelfth bits of the pixel driving data GD. For example, at the address stage WC of the subfield SF1, the pixel driving data bit DB1 is first converted to a pixel data pulse having a voltage corresponding to a logic level of the pixel driving data bit DB1. Then, a pixel datapulse group DP11 having m pixel data pulses for the first display line is prepared, a pixel data pulse group DP12 having m pixel data pulses for the second display line is prepared, . . . and a pixel data pulse group DP1n having m pixel data pulses for the nth display line is prepared. These pixel data pulse groups DP11 to DP1n are sequentially applied to the column electrodes D1 to Dm.
In the address stage Wc, a scan pulse SP with a negative polarity is sequentially applied to the row electrodes Y1 to Yn at the same timing as the application timing of the pixel data pulse groups DP. As a result, discharge (selected light-extinction discharge) occurs only in those discharge cells which are located at crossings of row electrodes to which the scan pulse SP is applied and column electrodes to which the high voltage pixel data pulse is applied, and the wall electric charge remaining in these discharge cells is eliminated.
According to such selected light-extinction discharge, the selected discharge cells shift from the light emitting mode to the light extinguishing mode. On the other hand, other discharge cells, in which the selected light-extinction discharge does not occur, maintain the initial condition (i.e., the light emitting mode) because the discharge cells are initialized to the light emitting mode at the all-reset stage Rc.
At the illumination sustaining stage Ic of each subfield, as shown in FIG. 3, light emission sustaining pulses IPX and IPY with a positive polarity are alternately applied to the row electrodes X1 to Xn and row electrodes Y1 to Yn. At the illumination sustaining stage Ic, the sustaining pulses IP are applied such that the numbers of the sustaining pulses IP applied to the subfields SF1 to SF12 have a predetermined ratio. For example, in the case shown in FIG. 1, the ratio of the application numbers of the light emission maintaining pulses IP for the subfields are as follows;                SF1:SF2:SF3:SF4:SF5:SF6:SF7:SF8:SF9:SF10:SF11:S12=1:2:4:7:11:14:20:25:33:40:48:50.        
The discharge cells in which the wall electric charge remains, namely, the discharge cells set to the lighting mode at the address stage Wc only perform the illumination-sustaining-discharge upon application of the illumination-sustaining pulses IPX and IPY. Accordingly, each of the discharge cells set to the lighting mode maintains the light emitting condition (light emission sustaining discharge) for a period corresponding to the numbers of the discharging, which is allocated to the subfield concerned.
A light extinction (elimination) stage E is executed only in the subfield SF12 at the rear end of the field. At the light extinction stage E, a light extinction (elimination) pulse AP with a positive polarity is generated and applied to the column electrodes D1 to Dm. In parallel with the application of the light extinction pulse AP, another light extinction pulse EP with a negative polarity is generated and applied to each of the row electrodes Y1 to Yn. The simultaneous application of the light extinction pulses AP and EP triggers the light extinction discharge within all the discharge cells in the PDP, so that the wall electric charges remaining in the discharge cells are all eliminated. As a result of such electric-charge-elimination discharge, all the discharge cells in the PDP are set to the light extinction mode.
In the above described driving method, the selected discharge for light extinguishment in the following manner takes place at a particular subfield; only discharge cells in the light emitting state in the immediately preceding subfield are selected for light extinguishing discharge in the address stage. Thus, if the N (e.g., twelve) subfields are sequentially lit from the front (first) subfield, N+1 (thirteen)-gradation-level display is created. By summing up the numbers of the light emission sustaining discharges in the subfields, the grayscale image having luminance in accordance with the input image signal is created.
Since a characteristic of a human vision has a logarithmic property, human eyes are sensitive to variations in the gradation sequence in a dark image. In the above described PDP driving method, the luminance difference between the first gradation level, which represents the lowest luminance 0, and the second gradation level, which represents the second lowest luminance, is given (determined) by the luminance of the light obtained from the light emission sustaining discharge. Since it is difficult to decrease the luminance of the discharge to a desired level, it is not possible to create intermediate luminance which faithfully represents the input image signal when a relatively dark image (low luminance image) is displayed.